1. Field of the Invention
The present invention relates generally to the field of micro-electronics. More particularly, this invention relates to the formation of porous silicon layers (PSL) and their lift-off in the manufacture of Silicon On Insulator (SOI) structures in the fabrication of photovoltaic cells.
2. Description of the Related Art
When manufacturing a solar cell, the top few microns of a silicon wafer actively participate in the conversion of solar energy. Most of the expensive silicon wafer provides mechanical strength to the cell. This function can be achieved by other low-cost substrates compatible with the solar cell fabrication process. Thus cost reduction may be achieved by providing a reduction in the use of silicon.
Silicon on insulator (SOI) structures are known in the art, for example in the manufacture of low-cost solar cells with high efficiency. Some of the advantages are prevention of latch-up, low parasitic capacitance, high-speed operation and the absence of a need for a welling process.
In general, FIGS. 1A, 1B, 1C, 1D, 1E, and 1F illustrate a prior art technique for the formation of a porous layer and its separation from the substrate. Generally, the formation and transfer of PSLs to other substrates involve the following steps:                Formation in a silicon substrate 1 of a low porosity layer 2 on the surface and a high porosity layer 3 thereunder by anodisation of silicon in hydrofluoric acid by changing the current density during the PSL formation.        Formation of a separation layer under the high porosity layer by high temperature annealing in hydrogen. This separation layer is a highly porous layer and is mechanically very weak. It can easily be broken by little mechanical force, e.g. by ultrasonic treatment or pulling.        Bonding of the obtained structure to another substrate using an adhesive.        
Formation techniques have been discussed by H. Tayanaka et al., 2nd world conference and exhibition on photovoltaic solar energy conversion, Vienna, Austria, 1272 (1998), and by T. J. Rinker et al., Applied Physics A, 68, 705-707 (1999), the entirety of each is incorporated herein by reference.
Another approach, disclosed by T. Yonehara et al. in Electrical Society Proceedings, Volume 99-3, 111, uses mechanical grinding, selective etching and hydrogen annealing for transferring thin silicon epi layers on the other substrate, the entirety of which is incorporated herein by reference. The European patent application EP 0867920 discussed the use of a laser beam for the separation of the thin layer from the silicon substrate, the entirety of which is incorporated herein by reference.
In U.S. Pat. Nos. 5,778,869 and 4,465,550, methods and apparatuses are described for slicing solid materials, especially semiconductor ingots, the entirety of each are incorporated herein by reference. These methods create kerf loss, need expensive equipment, are limited to removal of thick film layers, e.g., greater than 50 μm. Thus, there is a need in the art for a method and apparatus for the formation of substrate layer while minimizing the loss of substrate material as for instance kerf loss.